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Verification Testbench Tests
The verification testbench performs the tests in Table D-1 .
Table D-1 · Verification Testbench Tests
D
Test
01
02
03
04
05
07
08
10
11
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
40
41
42
43
44
Description
Simple Read and Write Test
All BARs Read/Write Test
Byte Enable Test
DEVSEL Timing Test
Address Parity Error Test
Interrupt Test
Data Parity Error Test
Two Target Test; checks that two targets do not interfere with each other.
Target Disconnect and Retry Test
Target Abort Test
Back-to-Back Transfer Test
BAR Overflow Test
Memory Read Line, Memory Read Multiple, and Memory Write & Invalidate Test
Unaligned Address Transfer Test
Target Dataflow Test with variable transfer rates
FIFO Interface Test with variable transfer rates
BAR Select Test; verifies BAR decode logic.
Read Byte Handshake Tests
Hot-Swap Interface Tests
Configuration Cycle Tests
Additional Target Retry/Disconnect Tests
Multiple FIFO Tests
User Target Routine
FIFO Status Register Tests
Simple DMA Transfer Test
Backend Control during Cycle Test
DMA Single Transfer Test
DMA Poll Status Test
DMA Counter Tests
v4.0
141
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